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$14.85 (as of December 22, 2024 01:47 GMT +00:00 - More infoProduct prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on [relevant Amazon Site(s), as applicable] at the time of purchase will apply to the purchase of this product.)A silicon wafer with 2-nm chips will cost $30,000, which is one and a half times more expensive than those with 3-nm chips. Maintaining the so-called Moore’s Law is becoming increasingly difficult and expensive for semiconductor manufacturers. According to estimates by analysts at International Business Strategies (IBS), transitioning to a 2-nm process will increase manufacturers’ expenses by nearly one and a half times compared to the 3-nm technology.
These estimates are provided in an extensive article by Nikkei Asian Review, which is presented in an easily digestible form by representatives of Tom’s Hardware. According to IBS analysts, building a facility to produce 2-nm chips at a volume of 50,000 silicon wafers per month will cost investors $28 billion, compared to $20 billion needed to build a similar facility processing the same number of silicon wafers per month with the more mature 3-nm technology.
The reason for this cost increase lies in the need to use more equipment suitable for working with extremely intense ultraviolet radiation (EUV), as such equipment remains very expensive. Consequently, chip manufacturers will have to pass these costs onto the cost of production, making the final product significantly more expensive for customers.
For example, for companies like Apple, a 300 mm silicon wafer with 2-nm chips will cost $30,000 if produced by TSMC, while a similar wafer with 3-nm chips would cost “only” $20,000 each. It will be more challenging for TSMC customers to justify transitioning to each new lithography step with such a dynamic increase in expenses. However, IBS specialists believe that currently, each 3-nm chip costs Apple approximately $50 per piece in the worst-case scenario of defect rates. If based on the crystal area of A17 Pro processors, their production using 3-nm technology with an 85% yield should ensure a cost of $40 per piece.
A similar processor in a 2-nm variant would cost $60 per piece at the production cost level, but IBS specialists raise the forecast bar to $85 per piece. Incidentally, some forecasts mentioned the cost of one silicon wafer with 2-nm chips at around $25,000, so the range of values can be quite broad. The trend of rising costs more severely affects developers of chips with monolithic crystal structures. Transitioning to a multi-crystal layout significantly reduces costs but requires higher quality chip packaging.
Adding to this, the transition to 2-nm technology represents a significant challenge in the semiconductor industry, both in terms of cost and technical complexity. The use of EUV lithography, necessary for such fine geometries, requires highly specialized and expensive equipment. This investment is expected to drive up not only the cost of the manufacturing facilities but also the per-unit cost of the chips produced.
This cost increase may impact the pricing of consumer electronics, particularly high-end devices that use these advanced chips. Companies like Apple, which rely heavily on cutting-edge semiconductor technology for their products, may face higher production costs, potentially affecting their pricing strategies and product launch timelines.
The move to 2-nm chips also signifies the ongoing pursuit of Moore’s Law, which predicts a doubling of the number of transistors on a microchip every two years, leading to continual performance enhancements. However, as the industry approaches the physical limits of silicon-based technology, each step forward requires significantly more investment and innovation.
Moreover, the shift to multi-crystal or chiplet architectures, as opposed to traditional monolithic designs, represents a major trend in semiconductor design. This approach can offer cost savings and flexibility but introduces new challenges in chip design and manufacturing.
2-nm Chip
In summary, while the move to 2-nm technology promises improvements in chip performance and energy efficiency, it also brings substantial challenges in terms of increased costs and technological complexity. This transition is likely to have broad implications for the semiconductor industry, consumer electronics markets, and the ongoing evolution of technology.
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